Sunday 25 August 2013

Cache Memory

Cache is a small, high speed memory which holds the most recently accessd pieces of main memory. SRAM (Static Ram) is used as cache sice they are faster.

Why is cache necessary???
Processors are getting better and their performances are very high. Today the time taken by a processor to execute an instruction is lesser than the time taken to fetch an instruction from the main memory.ypical access time for a DRAM access is around 60ns. A 100MHz processor just takes 10ns to execute an instruction. Thus here there is a bottleneck created and the efficiency of the processor would be wasted if cache and instruction pipelining are not used. Typical access time for an SRAM is 15ns.

If this is the case, why not replace the entire main memory with SRAM??. We cannot use SRAM as the main memory due to the following reasons.
  • SRAM is many times costlier compared to DRAM.
  • SRAM consumes more power.
  • SRAM is much denser than DRAM i.e the space occupied by SRAM is greater than the space that would be occupied by DRAM of the same capacity. A 1MB SRAM would be physically biggeroccupies more space) than a 1MB DRAM.
Cache terminologies
  1. Cache Hit: If cache contains the information required by the CPU, it is a cache hit. The access cycle ends with a cache hit and the cache responds to the CPU request.
  2. Cache miss: When cache does not contain the information required by the CPU, it is a cache miss. The information has to be fetched from the main memory and the cache would update itself during the main memory access.
  3. Cache Consistency: Since cache is a local copy of a small portion of the main memory, it is important that it reflects the actuall contents of the memory. Cache consistency is maintained by two processes,
    • Snooping: Cache is watching the address lines for transactions. This helps in seeing if the information requested by the CPU is available with cache or not.
    • Snarfing: Cacshe is watching the data lines and takes the information on it. Cache is kept updated this way.
    4.  Dirty Data: Data is written in the cache but not updated in the main memory.
    5.  Stale Data: Data is modified in the main memory and not updated in the cache.

Cache Architecture:
Cache architecture has 2 aspects,
1. Read Architecture: The Read Architecture may either be look aside or look through.
2. Write Policy: The Write Policy might be Write Back or Write Through.
Both Read Architectures can have any of the two types of Write Policies.

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